Despite RoHS, Products Must be Rugged and Reliable

Packaging Magazine, Volume 2, 2006

by John Starr, CirVibe 

Contrary to some belief, designing a lead-free electronics product that is rugged and reliable is easy—the product must meet or exceed design service life exposure and it must be free of workmanship defects (infant mortality failures eliminated).1

The age of RoHS is upon us. Even though the military and many other programs are exempt from these regulations, the old laws of supply and demand are already thinning out the availability of leaded components and it’s unlikely that suppliers will continue to offer two versions of the same component. The following article, part of PKG’s continuing coverage of critical RoHS issues, looks at one mechanical aspect of RoHS implementation and how to test designs to make them rugged and reliable despite some of the inherent weaknesses of lead-free solder. –Ed.

All other factors equal, lead-free products are less rugged under vibration than leaded. Because of a greater potential for solder joint problems, the need to fully understand ESS (Environmental Stress Screening) is significantly increased. Common lead-free solder joint failures include non-wetting, colder solder joints, blow holes, solder balls, insufficient solder, icicle formation, and more. ESS is critical to developing and maintaining a manufacturing process that produces reliable products. Methods for rugged and reliable production must include in-depth product understanding for design and ESS processes.

Lead-Free Solder Is Weaker—New Methods Needed

The defense and aerospace industries are exempt from lead-free restrictions, however, it’s almost inevitable that they will need to change to lead-free parts as manufacturers discontinue production of leaded products due to demand. A joint DoD / NASA / Industry consortium, Joint Council on Aging Aircraft/Joint Group on Pollution Prevention, has been evaluating the impact of lead-free electronics on reliability ( The consortium’s project is called the JCAA/JG-PP No-Lead Solder Project and boasts members from all branches of the Armed Services, NASA, Boeing, Rockwell-Collins, Raytheon, BAE Systems, ACI, Lockheed Martin, Texas Instruments, NCMS, Sandia National Labs, and Marshall Space Flight Center among others.

The No-Lead Solder project tests included vibration. Vibration life understanding is critical to product ruggedness and reliability.

The JCAA/JG-PP test items were specially constructed circuit cards, capable of instant detection of failure of components. Circuit cards were populated with CLCCs, PLCCs, TSOPs, TQFPs, BGAs and PDIPs. Sets of identical components were used in different positions. Thirty circuit cards were vibration tested. A picture of one of the cards is shown in Figure 1 , with components labeled with their failure times. Step stress tests were conducted to create failures. Step stress tests start with a fixed vibration profile ( Figure 2 ) . During each successive step, the input excitation was increased. Due to the exponential relationship between stress and life-use rate, each successive step accumulates damage at higher rates.

Vibration of electronics is complex. Time-to-failure differences are affected by normal fatigue scatter, dimensional variations, multi-mode response variations, test control, material properties control, production process, etc. Each product is unique in design details and requirements. Each component location experiences a different stress condition. Understanding a product’s capabilities generally requires extensive testing or combined analysis and testing due to product uniqueness. Products are unique at assembly level but are not as unique at component level. For “test-only methods,” only identical components in identical locations on identical test boards can be directly compared. The JGAA/JC-PP tests compared failure times of components in identical positions on the 30 boards. Lead-free test solder was used on one set of test boards and the SnPb control solder on a second set of test boards.

The tests conducted on vibration showed a significant reduction in life capabilities for lead-free designs. The preliminary report for the consortium concluded that developers of electronics may need to develop new design practices or methods to compensate for the strength and durability reductions.

Current Method Evaluation

Even though the development of electronic parts to military standards stopped decades ago, manufacturers have made progress in component environmental life capability. Commercial electronics also experience vibration, drop shocks and hot and cold exposure. Since development of weak components could hurt commercial sales, most components have some level of “mechanical loading” capability. Circuit card assembly processes for leaded solder assemblies have also improved over the years, greatly reducing the risk of flawed products due to production process problems. Natural evolution has improved component quality and production process methods.

There is an added advantage for designing for shock or vibration loading. A circuit card’s natural shock or vibration response protects most components from high stress, putting only a few parts at highest risk of failure. Even under design development methods lacking an evaluation of shock or vibration capabilities, there has been a reduced risk of that type of failure as component capabilities increased and production processes improved.

Does lack of failure in a vibration test mean the product is fully understood? Recently, a large government user of electronic products expressed disappointment in the reliability of purchased products. Not only did some products fail to meet reliability goals, but 30% of the time the requested redesigns were less reliable than the original. A 30% value implies redesign methods were not much better than “a best guess redesign,” not an in-depth understanding of the product at point-of-failure level. This also implies that the original reliability failures could have been due to inadequate development and/or production processes.

Common Bad Practices

There are some development practices that can account for reliability shortfalls. These “risky” practices used in the electronics industry include:

• Predefined ESS—Not customized to product

Frequently the ESS vibration spectrum is defined for a product before it is designed. This was a lower risk situation for leaded electronics. If the production process is reliable, the only real need for ESS is that it does no harm. If the production process poses risk—ESS is far more complex and must be customized to actual product details.

• Design for vibration by equation without design rules of limits of application

Circuit card assemblies are extremely complex structures. A simple equation is not capable of characterizing the fatigue life of a structure as complex as a circuit card assembly.

• Reliability for vibration by parts count

Many reliability methods include evaluation of circuit card assemblies by parts count, which is inherently inaccurate. Identical components on the same assembly can experience damage rates that are many orders of magnitude apart. A well advertised reliability database boasts 1012 years of field reliability, but includes no vibration data. Reliability for electronics requires detailed understanding of how it fails.

• HALT (or any test) without point-of-failure understanding

HALT (Highly Accelerated Life Testing) is a systematic method for finding product fragility levels. Most documented HALT processes include the step “understand the product at point-of-failure level whenever failure occurs.” This step is often neglected, but it is one of the most important steps. Failures provide an opportunity to learn about product design and should be fully exploited. Comparing ruggedness of products with different failure levels can be meaningless without product understanding.

Even with bad practices, many companies are still able to produce reliable products with leaded solder electronic products. Inherent product ruggedness from decades of experience helps reliability. However, RoHS is a new glitch in the progress.

An Answer to New Method Needs

One solution to the problem is offered by CirVibe Inc., which includes software and provides training in methods of development of rugged and reliable electronics that have worked for leaded products and meet the needs of the “JGAA/JC-PP new method” required for lead-free. This approach uses point-of-failure methods to define position-based damage rooted in the mechanics of load transfer and physics of failure.

These methods were used to evaluate the JGAA/JC-PP vibration data. CirVibe analysis verified that the lead-free products had lower vibration strength, and using point-of failure methods numerically compared failures in different locations in the design. By including failure data across positions with point-of-failure analysis, the differences between solder types could be defined to a higher level. The original consortium report and the CirVibe analysis report are posted on NASA’s Web site.

In addition to obtaining better definition of strength differences of solder types, position damage rates were used for predictions of failure time for a few components for both leaded and lead-free designs. Table 1 shows one set of the predicted times compared to actual time to failure. These are times-to-failure based on damage accumulation rates in the accelerated step stress test. This set was for leaded BGAs. As can be seen, fatigue predictions do not result in exact agreement with time to failure under test. Fatigue failures have large scatter. Scatter also occurs in time-to-failure for components in identical positions on different boards.

Rugged and Reliable Electronics

Obtaining reliable and rugged electronics with RoHS will be accomplished by applying the methods that have worked to obtain increased ruggedness or increased reliability of electronics in the past. This process can be accelerated by eliminating poor practices. By elimination of poor practices, greater ruggedness and higher reliability can be obtained at reduced cost. This must include properly run Accelerated Life Tests (ALT) and Environmental Stress Screening (ESS) processes supported by detailed understanding of the product. Evaluating failures is required, numerically defining them in a meaningful way at point-of-failure level. Failure data must be created in a “universal” format, not a format meaningful to a single product.

Quick fixes without incorporating lessons learned may obscure the problem of today and create a problem for tomorrow. ESS is at its best—effective and non-damaging—when you know your product’s weakest parts under ESS and what in the assembly is effectively screened.