John E. Starr is a registered professional engineer with over 35 years of continuous and varied experience in structural capabilities in Nuclear, Chemical, and Defense industries. His experience includes product ruggedness and reliability, design life, stress analysis, detailed analysis, methods development, finite element program application and development, test definition and evaluation.
For Electronic Systems, his experience includes vibration design Life, ESS, Qual Test, HALT, HASS, COTS and Physics of Failure (PoF) methods development and application. He has taught numerous electronic system vibration life ruggedness and reliability seminars to US and international engineers (commercial, industrial, aerospace, medical, military, national laboratories) including seminars at annual technical meetings of the Institute of Environmental Sciences and Technology (1994 - 1996). He holds two US Patents addressing ruggedness and reliability for vibration and shock of electronics.

COURSE DESCRIPTION

Continuing Education (CE) - 24 PDH Credits

Optimizing Electronics Vibration - HALT, HASS, ALT and ESS (Understanding Electronics Vibration)
Whether testing is HALT, HASS, ALT, ESS, Qualification or other type, understanding the product and also understanding how the test affects the product are both key to efficient testing. One step in the HALT process simply states "understand the root cause of failure". This is a fundamental part of all vibration testing but it is often avoided or inadequately covered due to its complexity. This course covers a giant leap in use of technology to visualize vibration damage and understand failure.
(Some previous attendee testimonials).
(Link to Schedule)

Course description
A three-day interactive workshop aimed at shortening the time required for electronics design, vibration testing and (when weaknesses are found) corrective action. This course applies to vibration of electronics at system, box or circuit card level. Methods can also be used in the design and testing of electronic components to meet vibration standards or desired capabilities. Discussion of simple methods and animations assist participants understand the complex responses of their electronics to laboratory and to field vibration. "Vibration test efficiency" is a new term, used here to illustrate recent improvements over the past slow "learning curve" for vibration knowledge. Since vibration life of most electronics is dependent on response at circuit card level, methods concentrate on the fatigue damage from PCB modal response. The purpose of this course is to simplify the complex field of vibration of electronics and make results understandable.

1% Efficiency?
Tests can determine fragility limits of test samples. But few tests supply any further information (beyond pass/fail). Why? Because test measurements can't fully describe failures. Most tests miss most of the valuable information that is (with this course) readily available.

Early Attempts
In the 70's and 80's, relatively simple mathematical methods were developed to predict PCB vibration life capabilities. Why? Because few companies could afford that era's high-speed computer systems and the technical expertise needed to analyze vibration. Those early methods, still used by many, provide guidelines that sometimes work, but they never provide product understanding. And all too often, such guidelines outright fail, at great expense - the expense of design and production of an unreliable product.

But since then, the cost of high-speed computer power has dropped at a rate of about 50% per year. The compounded cost savings of the mid 80's high-speed computer is over 99.99%. One of the best-kept secrets of certain large companies is their ability to produce reliable electronic products at low cost. How? They are able to fully understand vibration of their electronics through detailed analysis. Such companies rarely share their reliability secrets with competitors. But now, with this course, every company can afford high speed analysis support of its testing.

Test Efficiency?
Let's define test efficiency as dollar value of information gained divided by dollars of test cost. If you run a test program without analysis, your numerator is near zero. Adding modern technology analysis can immeasurably increase your "information gained" numerator.

Every test performed without detailed posttest analysis throws information away and wastes money. Rather than throw it away, capture that information and use it to save many design and production problems.

Detailed Analysis?
The "design life" of any system is defined by its weakest part based on the part's local exposure. Since vibration damage of circuit cards is dominated by cyclic stresses (caused by modal vibration), analysis should concentrate on accurately quantifying the stresses experienced by every component. Design life is limited by accumulated fatigue damage. Taking advantage of the speed of today's PCs, companies without prior experience can use this course to understand and avoid vibration-induced failures.

Applications

• Initial design product development. For any vibration requirement, circuit card life is defined by the failure distributions of a limited number of components. Adding PoF analysis (defined later, under Background) to the process helps to identify the weak areas of the design. Thus PoF analysis is a strong tool for understanding the pros / cons of proposed design improvements. With virtual qualification, we analyze various design changes to evaluate the improvements in previously critical components. We also evaluate the effects on other regions of the design.
• RoHS. New design and development rules are needed to produce highly reliable products with the weaker and less compliant solder types. Understanding the product at solder joint level helps reach desired reliability goals.
• Damage analysis of test response. When a component fails in a test, it provides data that represents part of that component's defined life distribution. By applying PoF analysis to circuit cards and by incorporating actual test response, we better understand damage at failure.
• Step stress damage (test response). Step stress testing is the most efficient method to determine vibration life capability. Step stress testing becomes more efficient when it is coupled with PoF analysis and previous experience. Starting stress levels can be set more efficiently. Each failure analyzed using PoF adds to future test effectiveness.
• Damage evaluations - multiple vibration requirements. Every cycle of vibration response contributes some tiny level of damage to the circuit card. When a design has multiple vibration requirements, each requirement uses a life fraction. Some requirements may be insignificant. PoF analysis allows life fraction evaluation for each requirement. Test costs can be reduced by eliminating insignificant test portions.
• Damage evaluations - changing response (Q , Fn). Variations in assembly procedures for circuit cards can result in differences in their responses (Q - transmissibility, Fn - natural frequency). Due to the exponential relationship of life to cyclic stress, response differences can lead to large variations in life capability. PoF analysis provides understanding of life effects.

Course Outline

• Sine Sweep and Sine Dwell
  • Random
  • Natural Mode Response
• Distribution of vibration test responses
• Isolation
• Circuit card natural response - frequencies and shapes

• Response
• Component positions
• ESS optimization
• Determining screen effectiveness for potential flaws

Class Hours
9am to 5pm

Fee
Fee is $2,495.  For registration and payment received one month prior to course, deduct $100.  For three or more participants from an organization and payment received one month prior to course, deduct $200 each. Course fee payment is nonrefundable.

Registration:
Telephone: (763) 559-5166
E-mail: info@cirvibe.com

For whom intended

Individuals - Designers, developers, producers and vibration test personnel, etc. involved with electronics printed wiring boards (PWB) subject to vibration. Participants gain understanding of their products - what fails and why, also how to repair or redesign to prevent service life failures.

Organizations - Here are a few examples:

1. Test labs that desire to supplement their testing services with understanding of failures.
2. Companies seeking to revise their development methods in view of RoHS.
3. Test equipment manufacturers that want to demonstrate the advantages of their equipment.
4. Companies using pre-production HALT (highly accelerated life testing) or post-production ESS (environmental stress screening) or post-production HASS (highly accelerated stress screening). All of these employ broad-spectrum random vibration.
5. Companies having reliability problems - unexpected service life failures
6. Companies that experience field failures that can't be duplicated in test
7. Companies that need virtual evaluation of design improvements or HALT, ESS and HASS testing or repair options.

Background
For many electronic systems, vibration is part of the qualification test requirements. "Qual" test vibration is intended to accelerate the vibration damage anticipated during a life of service use. Military, naval and aerospace companies often must design systems for use in severe life environments. Today they may be required to use Commercial-Off-The-Shelf (COTS) boards and components. These may need "ruggedizing" to withstand a lifetime of military (severe) usage.

As said earlier, random vibration is widely used. Operating products are exposed to various environmental conditions (including particularly random vibration) in order to precipitate (make visible) heretofore latent defects associated with faulty production parts and poor workmanship flaws. Pre-production HALT (highly advanced life testing) and post-production HASS (highly accelerated stress screening) also use random vibration. In all these situations, the "efficiency" of design, development, testing and/or screening processes can be increased. This requires full understanding of how a product responds to vibration. Gaining this knowledge was once a difficult task. Many specifications and recommended procedures required a structural expert for proper use and application. That is no longer true.

A major goal of this course is to prepare design and test engineers to properly apply tests and screens and thereby gain needed understanding of their test failures. A secondary goal: to avoid damaging good products. Excessive damage in fragile areas can be avoided and yet critical regions can be adequately exposed.

Physics Of Failure (PoF) Analysis
PoF analysis is an evaluation of the product at each point of failure, considering all contributions to each failure. The course presents PoF vibration tools which ease the interdependent processes of design, development and production of reliable electronic hardware. Both commercial and military companies are incorporating PoF for developing more reliable products - while reducing costs. Preventing component level damage under vibration is key to developing products that meet design requirements. PoF analysis is also key to optimizing ESS "efficiency".

The PoF analysis taught in this course translates test measurement data into fatigue damage exposure indices at point of failure level. All too often, attempts are made to define hardware capability in response measurement terms, such as RMS Gs. Statements of survived applied vibration intensity (too often stated in overly-simple terms such as 6g RMS) are relatively useless. However, an analysis tool such as PoF adds useful information to the process. The PoF methods taught here are efficient AND easy to understand.

The course uses CirVibe, a PoF tool for analyzing circuit card exposure to vibration, to demonstrate all of the analysis methods presented. Neither CirVibe nor the course requires expertise in finite element analysis. Participants receive understanding that makes their design, development, test and production of reliable electronics into efficient processes. In its simplest form. CirVibe models, created in minutes, can provide valuable information on vibration damage distribution across the any circuit card under single or multiple environments. A postprocessor calculates fatigue damage distributions based on component position on the card. Methods can accommodate steady state and cyclic thermal contributions to fatigue failure.